Semiconductor test system, semiconductor test method, method of wiring pattern formation and semiconductor integrated circuit
US5453994A · kind A · utility
36Cited by
10References
14Claims
0Family size
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Key dates
| Filing date | Jul 15, 1993 |
| Grant date | Sep 26, 1995 |
| Priority date | — |
| Expiry date | Jul 15, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/311
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The semiconductor test system comprises an OBIC measuring device (8) and a tester (5). The tester (5) transmits a test signal to an input pad (2a) of a semiconductor integrated circuit (1). In synchronization with this, the OBIC measuring device (8) irradiates drain regions (6) of the semiconductor integrated circuit (1) with a laser beam (7) one after another, to thereby detect the generation of the OBIC. An comparator (5c) in the tester (5) compares an output signal from an output pad (2b) of the semiconductor integrated circuit (1) and an OBIC detection signal from the OBIC measuring device (8) with expected values (5b).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.