Branching system for return from subroutine using target address in return buffer accessed based on branch type information in BHT
US5454087A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 1992 |
| Grant date | Sep 26, 1995 |
| Priority date | — |
| Expiry date | Oct 23, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4486
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address of a branch instruction, a branch target address thereof, and a type thereof are stored as branch history information in a branch instruction buffer. In addition, a return address for a return from a subroutine is retained in a return buffer. A look-up operation is conducted through the buffer by using the pre-fetch address such that when a hit occurs, a branch target address is output from the buffer depending on a branch instruction type. Consequently, the branch processing is achieved at a high speed. Particularly, the processing speed of an unconditional branch instruction containing a return instruction is increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.