Multilayer LTCC tub architecture for hermetically sealing semiconductor die, external electrical access for which is provided by way of sidewall recesses
US5455385A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 1993 |
| Grant date | Oct 3, 1995 |
| Priority date | — |
| Expiry date | Jun 28, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T156/1082
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaging assembly for a semiconductor circuit chip is formed of a hermetically sealable, `tub`-like structure. The tub-like structure is comprised a laminated stack of thin layers of low temperature co-fired ceramic (LTCC) material. The laminated stack of LTCC layers contains an internally distributed network of interconnect links through which a semiconductor die, that has been mounted at a floor portion of the tub, may be electrically connected to a plurality of conductive recesses or pockets located at top and bottom sidewall edge portions of the tub, thereby allowing multiple tubs to be joined together as a hermetically sealed assembly and electrically interconnected at the conductive pockets of adjacent tubs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.