SRAM to ROM programming connections to avoid parasitic devices and electrical overstress sensitivity
US5455788A · kind A · utility
7Cited by
4References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 24, 1993 |
| Grant date | Oct 3, 1995 |
| Priority date | — |
| Expiry date | Aug 24, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Programming connections convert a partially fabricated six transistor SRAM cell to a ROM cell while avoiding parasitic devices and electrical overstress sensitivity but providing an active pull-up device for the bit line that is to be driven high.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.