Alignment system for planar electronic devices arranged in parallel fashion
US5456018A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 1994 |
| Grant date | Oct 10, 1995 |
| Priority date | — |
| Expiry date | Feb 28, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
This invention is directed to a system for precisely aligning a pair of electronic devices, such as an integrated chip test socket electrically interconnected to a motherboard, where such devices are arranged in a parallel relationship. The system includes a method which comprises the steps of fixedly securing plural projections on a planar surface of each of the devices, where each projection includes a flat side or edge and that the flat side of at least two adjacent projections define a first plane or reference line. Arranging the respective planar surfaces in close proximity to one another whereby the projections from one surface contacts the other planar surface. Thereafter, shifting the respective devices relative to one another until the respective first planes or reference lines are aligned into a common plane or line. Finally the devices are fixedly secured together, whereby the electrical interconnections between the devices are precisely aligned.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.