System having main unit for shutting off clocks to memory upon completion of writing data into memory and information supervising unit to read the data
US5457781A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 1993 |
| Grant date | Oct 10, 1995 |
| Priority date | — |
| Expiry date | Jan 4, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention provides a method and apparatus for immediate control communications between supervising and main processor units. A method in accordance with the invention comprises the steps of: providing a communications memory means within a first clocked system (main system); providing a protocol means within the first clocked system (main system) for indicating various communications states; providing a scan interface, operatively coupled to the communications memory means and the protocol means, for interrogating the state of the protocol means and for scanning data into or out of the communications memory means within a first clocked system (main system); coupling an external second system (SVP) by way of the scan interface to the protocol means and the communications memory means; operating the protocol means so as to indicate to the external second system (SVP) when it is permissible for the second system (SVP) to scan data into or out of the communications memory means; and further operating the protocol means so as to indicate to the first clocked system (main system) whether and/or when the external second system (SVP) has scanned data into or out of the communications m…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.