Architecture for isolating display grid sections in a field emission display
US5459480A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 1994 |
| Grant date | Oct 17, 1995 |
| Priority date | — |
| Expiry date | Sep 16, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N17/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention teaches a field emission display ("FED") architecture for isolating display grids, wherein an FED has a plurality of pixels. Each of the pixels comprise at least two field emitter tips for displaying information to the pixel and a pixelator for driving the field emitter tips. Further, an isolated display grid is incorporated for each of the field emitter tips. Each display grid is coupled by a link to a bus having a predetermined voltage. In one embodiment of the present invention, the link can be disintegrated by internal or external means. In a second embodiment, the FED comprises a first and second bus, each bus having a predetermined voltage, whereby a first isolated display grid is coupled to the first bus by a first link and a second isolated display grids is coupled to the second bus by a second link.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.