Dynamic RAM, dynamic RAM plate voltage setting method, and information processing system
US5459684A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 1994 |
| Grant date | Oct 17, 1995 |
| Priority date | — |
| Expiry date | Feb 16, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4074
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic RAM enhanced in integration and storage capacity, a method of setting a plate voltage of the dynamic RAM, and an information processing system reduced in size and enhanced in performance are provided. The plate voltage is set such that a leakage current of an information storage capacitor when a bit line voltage is positive relative to the plate voltage is made substantially equal to a leakage current of the capacitor when the bit line voltage is negative relative to the plate voltage. For this plate voltage setting, a plate voltage generating circuit is provided with an output voltage adjusting capability. A monitoring capacitor is formed on the same semiconductor wafer on which the information storage capacitor is formed. This monitoring capacitor is formed by a same method by which the information storage capacitor is formed, and is made of a same material of which the information storage capacitor is made. The monitoring capacitor is tested in a wafer probing process. Based on a measurement result, the plate voltage is set to an optimum level. The information processing system is constituted with the dynamic RAM as its memory device having the optimum plate voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.