Method and apparatus for implementing a triple error detection and double error correction code
US5459740A · kind A · utility
12Cited by
10References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 23, 1992 |
| Grant date | Oct 17, 1995 |
| Priority date | — |
| Expiry date | Nov 23, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/151
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for achieving the detection of triple errors and the correction of double errors in data stored in a memory or processed in a data processing system. The method and apparatus being based on a modification of a standard Bose Chauduri Hocquenghem (BCH) code that permits a reduction of the decoding circuitry needed to achieve the detection and correction of the errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.