Electrostatic discharge protection with hysteresis trigger circuit
US5463520A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 9, 1994 |
| Grant date | Oct 31, 1995 |
| Priority date | — |
| Expiry date | May 9, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An integrated circuit obtains improved ESD protection by way of a shunt protection circuit having a trigger level that exhibits a hysteresis effect with respect to voltage applied to the bondpads. The hysteresis is obtained by a string of voltage dropping transistors that produce a trigger voltage level at an intermediate node, and a shorting transistor that effectively removes at least one transistor from the string. In a typical case, a PNP bipolar transistor serves as the protective device in the circuit to carry the ESD current from the bondpads. An illustrative embodiment with p-channel voltage dropping transistors and an n-channel shorting transistor is shown, along with additional capacitive boost circuitry for speeding up circuit operation. In this manner, a high peak ESD current can be carried while ensuring non-conduction of the protection circuit for normal operating voltages, and also for voltages slightly in excess of normal power supply voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.