Decimation filter using a zero-fill circuit for providing a selectable decimation ratio
US5463569A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1994 |
| Grant date | Oct 31, 1995 |
| Priority date | — |
| Expiry date | Jun 24, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0664
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A decimation filter for filtering an externally derived stream of quantized electrical signals includes a coefficient generator responsive to a set of externally derived decimation-ratio select signals to provide a separate normalized coefficient signal at each respective one of a plurality of output ports. The coefficient generator employs a zero-fill circuit comprising first and second circuits which selectively ripple therethrough an scaling-control output signal from a demultiplexer unit in order to provide the normalized coefficient signals. An accumulator is coupled to the coefficient generator to receive each normalized coefficient signal generated therein. The accumulator receives the stream of quantized electrical signals so as to produce, upon masking with respective ones of the received normalized coefficient signals, a plurality of accumulator output signals. An overflow detector is coupled to the accumulator to detect and correct any overflow condition arising in the accumulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.