3.3 volt CMOS tri-state driver circuit capable of driving common 5 volt line
US5467031A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1994 |
| Grant date | Nov 14, 1995 |
| Priority date | — |
| Expiry date | Sep 22, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00315
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A CMOS tri-state driver circuit is capable of operating in a normal drive mode and in a high impedance mode. The circuit is powered by a 3 volt power supply, and drives an output terminal that is common to a TTL or other device that can apply a 5 volt output to the output terminal. The circuit includes a PMOS pull-up transistor and an NMOS pull-down transistor that are connected to the output terminal. The pull-up transistor is formed in and has a substrate terminal that is connected to an N-well. A switching transistor is controlled to connect the N-well to the power supply in drive mode to ensure stable and strong pull-up drive. A pass-gate transistor is biased to turn off the switching transistor when the voltage at the output terminal is higher than the power supply voltage in high impedance mode, causing the N-well to float. This prevents leakage current from flowing through a semiconductor junction from the output terminal to the N-well through the pull-up transistor. A shorting transistor is controlled to short the gate of the pull-up transistor to the N-well when the voltage at the output terminal is higher than the power supply voltage in high impedance mode, thereby preve…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.