Two clock method for synchronizing a plurality of identical processors connected in parallel
US5467465A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 17, 1993 |
| Grant date | Nov 14, 1995 |
| Priority date | — |
| Expiry date | Nov 17, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4217
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to simplify the use of a plurality of identical processors connected in parallel. The method contains the steps of: (a) obtaining a computer system having a CPU and a plurality of identical processors connected in parallel, the processors are also connected to the CPU; (b) obtaining first and second clocks of different oscillation frequencies, wherein the first clock having a slower oscillation frequency than the second clock; (c) connecting the first clock to only one of the plurality of processors and connecting the second clock to the rest of the plurality of processors; and (d) instructing the CPU to check only the processor connected to the first clock, which is connected to the slower clock, for a ready signal, and instructing the CPU to proceed to next step if a ready signal is received from the processor connected to said first clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.