Integrated circuit package having a multilayered wiring portion formed on an insulating substrate
US5468997A · kind A · utility
79Cited by
4References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1994 |
| Grant date | Nov 21, 1995 |
| Priority date | — |
| Expiry date | Dec 30, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16152
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package in which three conductor columns for connecting an insulating substrate and an integrated circuit are connected in parallel for use as I/O vias. Thereby, the conductor columns in a multilayer wiring portion between an integrated circuit and an insulating substrate is prevented from disconnecting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.