Central processing unit address pipelining
US5469544A · kind A · utility
27Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 9, 1992 |
| Grant date | Nov 21, 1995 |
| Priority date | — |
| Expiry date | Nov 9, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4243
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor for use in a computer system which pipelines addresses for both burst and non-burst mode data transfers. By pipelining addresses, the microprocessor is able to increase the throughput of data transfers in the system. In the present invention, bits are used which may be programmed to disable and enable the address pipelining for the non-burst mode and burst mode transfers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.