Low-loss active voltage-clamp circuit for single-ended forward PWM converter
US5471376A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 1993 |
| Grant date | Nov 28, 1995 |
| Priority date | — |
| Expiry date | Mar 5, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/01
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Transformers (T1, T2), switches (M1) and (M2), rectifiers (DR1, DR2, DR3, DR4) and low-pass filter (LF, CF) form a basic power train circuit (12). Auxiliary switches (A1, A2), diodes (DS1, DS2) and capacitors (CS1, CS2) form active clamp circuit (10). The capacitances for (CS1, CS2) are chosen large enough such that the voltages (vCS1, vCS2) across the capacitors are essentially constant during several switching cycles. Switches (M1) and (A1) are driven by the signal (V.sub.G1), while switches (M2) and (A2) are driven by (V.sub.G2). When (M1) is turned OFF, the energies stored in the magnetizing and leakage inductances in (T1) will resonate with the output capacitance of (M1) first. When the voltage (V.sub.M1) across (M1) exceeds the voltage (V.sub.CS1) across (CS1), (DS1) conducts and (V.sub.M1) is clamped at (V.sub. CS1), which has a steady-state value of slightly less than two times the input voltage (E). During this interval, the capacitor (CS1) is charged by the leakage inductor current (i.sub.LK1). When (i.sub.LK1) reduces to zero, (DS1) stops conducting, and (V.sub.M1) decreases to the level of (E). When (M2) is triggered, (A1) is also triggered. Diodes (DS1) and (DS2) are b…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.