Elastic configurable buffer for buffering asynchronous data
US5471581A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 1993 |
| Grant date | Nov 28, 1995 |
| Priority date | — |
| Expiry date | Jun 23, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2205/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An elastic buffer is provided between two busses working with independent clocking. The buffer is implemented by a piece of RAM memory (37) partitioned into sectors (41), each of which contains successive memory addresses. Each sector (41), can be alternatively written and read, so that at a given moment, a sector in write mode and a sector in read mode may coexist. Each sector is controlled by a mark flag (MF), a set flag corresponding to a fully written sector, and a reset flag corresponding to a sector that has been read onto the destination bus. The mark flag of each sector is set, respectively reset, upon the event of a move in pointer, respectively move out pointer, reaching the next adjacent sector. For a given elastic buffer size, the size of the sectors (41) and the number of mark flags are adaptable to the specifications of the data flow between the origin and destination busses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.