Multiprocessor data processing system having nonsymmetrical channel(x) to channel(y) interconnections
US5471589A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 1993 |
| Grant date | Nov 28, 1995 |
| Priority date | — |
| Expiry date | Sep 8, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17381
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiprocessor data processing system comprises a plurality of unsymmetrically connected data processing nodes; where the total number of nodes is more than 2.sup.n-1 and less than 2.sup.n, and n is an integer larger than two Each node has n input/output channels which respectively are channel(0), channel(1), channel(2), etc.; each node has a binary address b.sub.n-1. . . b.sub.1 b.sub.0 which runs consecutively from node to node; each pair of nodes whose binary addresses differ by only one binary bit b.sub.x are interconnected by a channel(x) to channel(x) connection; and, at least one pair of nodes whose binary addresses differ by two binary bits b.sub.x and b.sub.y are interconnected by a channel(x) to channel(y) connection, where x and y=0,1, . . . n-1. To establish a route from any one node to any other node, channels are selected which decrease the distance to the destination by two nodes or one node or maintain the same distance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.