Semiconductor memory component comprising stacked memory modules
US5473196A · kind A · utility
53Cited by
1References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 2, 1994 |
| Grant date | Dec 5, 1995 |
| Priority date | — |
| Expiry date | Feb 2, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06589
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory component has a rectangular semiconductor substrate containing active memory circuits and output terminals on a major surface thereof. An insulating layer on the major surface receives a plurality of metal connection leads, connecting the output terminals to connection pads located on the major surface along only one of longer sides of the substrate. A plurality of additional pads are distributed between the connecting pads and are devoid of connection leads. A memory module comprising several stacked memory components is also described, which uses the additional pads as relays.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.