Component to composite video signal converter circuit
US5473390A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 1995 |
| Grant date | Dec 5, 1995 |
| Priority date | — |
| Expiry date | Jan 31, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/641
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A bias source (R7,R8,C24) connected to a summing amplifier (Q1) produces a first DC bias at the amplifier input (emitter) and a second DC bias at the amplifier output (collector). A first circuit node (B) is AC coupled (22) to a luminance signal source (Y1, 18), DC coupled via a first resistor (R4) to the input of the summing amplifier and DC coupled via a first amplifier (28) to a luminance load (Y3,30). A second circuit node (A) is AC coupled (20) to a chrominance signal source (C1,18), DC coupled via a second resistor (R3) to the input (emitter, Q1) of the summing amplifier and DC coupled via a second amplifier (26) to a chrominance signal load (C3,30). A third amplifier (Q2) provides DC coupling of the output of the summing amplifier (Q1) to a composite video signal load (E,40). Advantageously, the circuit provides component to composite conversion with plural buffered outputs which may exhibit different power gains, which are stable notwithstanding load impedance variations and which are DC biased by bias produced at the summing amplifier input as well as its output thereby simplifying the conversion and buffering.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.