Complex arithmetic processor and method
US5473557A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1994 |
| Grant date | Dec 5, 1995 |
| Priority date | — |
| Expiry date | Jun 9, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A complex arithmetic processor and method includes a host interface for distributing data, a left memory and a right memory each coupled to the host interface, and a Z memory coupled to the host interface. The left memory and the right memory store the data and the Z memory stores Z memory data. A right/left switch is coupled to the left memory and to the right memory and makes left memory a data source and a right memory a data destination in a first setting, and makes the right memory the data source and the left memory the data destination in a second setting. An arithmetic engine is coupled to the host interface, to the Z memory, and to the left and right memories. The arithmetic engine uses the data and the Z memory data to perform an operation on the data to produce a result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.