Data hold circuit
US5473571A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 1994 |
| Grant date | Dec 5, 1995 |
| Priority date | — |
| Expiry date | Sep 29, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data hold circuit storing a logic state of a predetermined node of a logic circuit immediately before power supply to the logic circuit is interrupted, and restoring the stored logic state to the predetermined node immediately after the power supply is restarted. The data hold circuit includes a memory circuit storing the logic state of the node, a switch circuit connected between the memory circuit and the node, and a control circuit controlling the on/off operation of the switch circuit. The control circuit turns on the switch circuit for a predetermined time period when the power supply is changed from on to off, or from off to on. The memory circuit is continuously supplied with power from a power supply other than that for the logic circuit. While the power supply to the logic circuit is in a steady state either in the power on state or power off state, the switch circuit is kept off, thereby preventing effect of the memory circuit on the logic circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.