Efficient data storage arrangement for far-end echo canceller
US5473600A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 20, 1994 |
| Grant date | Dec 5, 1995 |
| Priority date | — |
| Expiry date | May 20, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B3/237
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An efficient data storage scheme for an echo canceller for a high-speed modem provides for storing in bulk memory, instead of a trellis-encoded codewords, unencoded words of lesser length in bits. For a v.32terbo modem operating at 19,200 bps, for example, the unencoded word has only eight bits as compared to nine bits for the trellis-encoded codeword. Therefore, one memory word (16 bits) can be used to store two unencoded words, resulting in memory savings of 50%. More particularly, in accordance with one embodiment of the invention, full-duplex, high-speed data communications using echo cancellation is performed by storing in memory transmit data represented in a first form, at predetermined intervals substantially equal to a round-trip delay time, reading out transmit data from memory and trellis-encoding the transmit data to produce trellis-encoded transmit data, and performing echo cancellation using data derived from the trellis-encoded transmit data. In accordance with another embodiment of the invention, an apparatus for high-speed data communications includes first circuitry, having a first encoder, for producing first signal element data from multi-bit data symbols, an ec…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.