Apparatus for avoiding complementarity in an encryption algorithm
US5473693A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 21, 1993 |
| Grant date | Dec 5, 1995 |
| Priority date | — |
| Expiry date | Dec 21, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0625
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An implementation of a security algorithm such as DES is provided that overcomes the complementarity weaknesses provided by conventional implementations. In a DES implementation, a cryptographic processor applies the DES algorithm to a data block. The DES processor includes a first input port for receiving the data block, a second input port for receiving a cryptographic key, and an output port for outputting the data block after encryption. A nonlinear function that does not have complementarity is applied to at least one of the ports. The nonlinear function can comprise a lookup table, which could be advantageously derived from a DES S-Box.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.