Controlled tapered angle etching process for fabricating optical integrated circuits
US5473710A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1993 |
| Grant date | Dec 5, 1995 |
| Priority date | — |
| Expiry date | Oct 8, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2006/12195
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention discloses an OIC fabrication system which includes a tapered angle computing means for computing a tapered angle for aching a required coupling efficiency. The fabrication system also includes a fabrication control means which includes a tabulated fabricating parameter database for determining and controlling a plurality of fabricating parameters. The fabrication system also includes an etching system which receives a plurality of control signals from the fabrication controlling means to carry out the etching process to form a tapered etching angle such that the optical coupling efficiency can be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.