Method for filling via holes in a semiconductor layer structure
US5474651A · kind A · utility
14Cited by
1References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 11, 1994 |
| Grant date | Dec 12, 1995 |
| Priority date | — |
| Expiry date | Aug 11, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/4644
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
For filling via holes that extend onto interconnects to be contacted in a semiconductor layer structure, the interconnects are connected to a conductive layer through auxiliary via holes. The via holes are filled with metal by electro-deposition, whereby the interconnects are wired as a cooperating electrode in an electrolyte via an auxiliary contact to the conductive layer. Subsequently, the conductive layer is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.