Antenna switching circuit employing FETs for reduced power consumption
US5475875A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 1994 |
| Grant date | Dec 12, 1995 |
| Priority date | — |
| Expiry date | Jun 10, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An antenna switching circuit comprises a first amplifier including a first FET receiving a first receive signal from a first antenna at a gate of the first FET, and amplifying the first receive signal, and outputting the amplified signal via a drain of the first FET to an output terminal, and a second amplifier including a second FET receiving a second receive signal from a second antenna at a gate of the second FET, and amplifying the second receive signal and outputting the amplified signal via a drain of the second FET to the output terminal. The first and second FETs are coupled to receive, at their sources, first and second control signals complementary to each other so that one of the FETs is made active while the other is made inactive, depending on values of the first and second control signals. The consumption current is reduced, and in addition, an amplifier in a receiver provided to receive the output of the antenna switching circuit may be omitted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.