Method of semiconductor device representation for fast and inexpensive simulations of semiconductor device manufacturing processes
US5481475A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 10, 1993 |
| Grant date | Jan 2, 1996 |
| Priority date | — |
| Expiry date | Dec 10, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/23
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data structure is used in semiconductor process integration studies for manufacture of device structures, where one dimension of the data structure is used to represent each film layer in the device and one or two additional dimensions represent vertical regions within the device. Primary data values within this data structure are the thickness of film layers at the corresponding vertical region. Using this data structure, process integration studies can be performed rapidly and efficiently on a microcomputer. The data structure simplifies the identification of overetching and overfilling, facilitating the use of thinner film layers and shorter process steps. Statistical simulations, to account for process control limitations on the uniformity of deposition and etching rates, are easily accommodated by a natural extension of the data structure to an additional dimension.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.