Semiconductor memory device incorporating address change detection circuit for page mode access
US5483498A · kind A · utility
28Cited by
6References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 22, 1994 |
| Grant date | Jan 9, 1996 |
| Priority date | — |
| Expiry date | Jun 22, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device of the invention is provided with a usual access mode and a rapid access mode. The semiconductor memory device includes: a change detection circuit, provided for each of bit signals which are a part of an address signal, for detecting a change of the address signal; a timer circuit for, when the change detection circuit detects the change of the address signal, generating a signal indicating the change of the address; and an output circuit for outputting the signal generated by the timer circuit as a signal which controls a wait of access in each of the access modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.