Method and apparatus for assigning processors in parallel computer system
US5485612A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Feb 4, 1992 |
| Grant date | Jan 16, 1996 |
| Priority date | — |
| Expiry date | Feb 4, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/45
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system has a plurality of processors, each having a local memory. An expression is represented by operands and operations and is expressed in a form of a tree. The operands are assigned to leaf nodes of the tree and the operations are assigned to interior nodes. Processors which store an operand represented by a leaf node are assigned to the leaf node. The tree is traced in a bottom-up fashion to determine a set of candidate processors to be assigned to each of the interior nodes. The candidate processors are determined from processors which are assigned to children nodes of each interior node in accordance with a majority method. The majority method is based on a rule that a processor which is most frequently assigned to the children nodes of an interior node is determined as a candidate processor. A root processor is assigned to a root node of the interior nodes from the candidate processors. The tree is then traced in a top-down fashion to determine definitely one processor to be assigned to each interior node from the candidate processors determined for the corresponding interior node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.