Low power crystal oscillator
US5486795A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 1993 |
| Grant date | Jan 23, 1996 |
| Priority date | — |
| Expiry date | Apr 22, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B5/364
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The LOW POWER CRYSTAL OSCILLATOR shown here reduces power consumption of a Pierce oscillator which has an inverter preferably made of an NFET N0 and a PFET P0 in series. A load, preferably an NFET N1 with its gate wired to its source, is placed in parallel with a switch, preferably a PFET P1, between P0 and Vcc. A clamp, preferably a PFET P2 with its gate wired to its source, is placed in parallel with a switch, preferably an NFET N2, between N0 and ground. The switches are enabled during power-up, thereby providing quick turn-on of the oscillator. They are then disabled, thereby reducing the voltage across the crystal XTAL and consequently reducing the power consumed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.