Transform processor system having reduced processing bandwith
US5487172A · kind A · utility
140Cited by
47References
72Claims
0Family size
Inventor
Key dates
| Filing date | Sep 20, 1991 |
| Grant date | Jan 23, 1996 |
| Priority date | — |
| Expiry date | Sep 20, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved transform processing system reduces processing bandwidth with improved processor architectures and improved transform algorithms. A hierarchal arrangement facilitates use of the same coefficients for multiple transforms, particularly when the coefficients have not changed. A detector arrangement is provided for detecting a change condition and then causing the processor to bypass redundant processing operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.