High speed sampling apparatus and method for calibrating the same
US5488369A · kind A · utility
6Cited by
5References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 15, 1988 |
| Grant date | Jan 30, 1996 |
| Priority date | — |
| Expiry date | Jul 15, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R35/005
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A high speed sampling apparatus based on multiplexed charged coupled devices or sample and hold devices (18) utilises a microprocessor (20) to monitor timing differences between clock signals, each used to clock a respective one of the devices and a reference signal to control a variable timing delay (12, 13, 14) whereby to calibrate each of the devices (18). The control of the variable timing delay (12, 13, 14) is achieved by a digital/analogue converter (15) and additionally, a mark to space ratio control of the variable timing delay is also provided using a digital/analogue converter (16).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.