Video signal processing method for changing a video signal display format
US5488432A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 1994 |
| Grant date | Jan 30, 1996 |
| Priority date | — |
| Expiry date | Dec 21, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N11/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention concerns a processing method for a video signal coded in the form of blocks of K words, this signal being written to or read from two frame memories (FM1, FM2) each including an input port, a high speed output port and a low speed output port. According to this method, the input digital video signal is formed by sets of M' blocks with N' block containing luminance data (Y1, Y2 . . . ) and M'-N' blocks containing chrominance data (C1, C2 . . . ), the blocks containing the chrominance data (C1) are written in the first memory (FM1) and the blocks containing luminance data (Y1) are written in the second memory (FM2). Then the blocks containing the luminance data and the blocks containing the chrominance data are read simultaneously on the high speed output port of each memory, the memories being inverted at each frame, and the data eventually being processed to obtain video data in output that presents a compression ratio M/N with M>N.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.