Semiconductor integrated circuit for outputting data with a high reliability
US5488580A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 12, 1994 |
| Grant date | Jan 30, 1996 |
| Priority date | — |
| Expiry date | May 12, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated memory circuit which extends the time that reliable effective data is output by a data output buffer. The circuit includes a switching device operated by a control signal which is determined according to the states of a row address strobe signal and a column address strobe signal. The switching device is conductive when the column address strobe signal is in an active state, and the switching device is nonconductive when the column address strobe signal is in a precharge state, so that effective data is output by the data output buffer until the column address strobe signal becomes active in the next data read cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.