Fault tolerant computer system with shadow virtual processor
US5488716A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 1994 |
| Grant date | Jan 30, 1996 |
| Priority date | — |
| Expiry date | Jan 14, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/815
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fault-tolerant computer system has primary and backup computers. Primary and backup virtual machines running on the computers are controlled by corresponding virtual machine monitors. The virtual machines execute only user-mode instructions, while all kernel-mode instructions are trapped and handled by the virtual machine monitors. Each computer has a recovery register that generates a hardware interrupt each time that a specified number of instructions, called an epoch, are executed. Prior to failure of the primary computer, the backup computer's virtual machine monitor converts all I/O instructions into no-ops and the primary computer sends copies of all I/O interrupts to the backup computer. To ensure that the instruction streams in the primary and backup virtual machines are identical and that all instructions for handling interrupts and traps are executed at exactly the same point in the two virtual machines' instruction streams, all interrupts and traps that occur on the primary computer during an epoch are buffered by the virtual machine monitor. At the end of each epoch, the buffered interrupts and traps are delivered to the primary computer's virtual machine and a messag…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.