Microprocessor having a run/stop pin for accessing an idle mode
US5488728A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 31, 1994 |
| Grant date | Jan 30, 1996 |
| Priority date | — |
| Expiry date | Oct 31, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor is disclosed herein with an idle mode of operation. The microprocessor provides a very quick interrupt that can be asserted externally. A Run/Stop (R/S) pin on the chip is asserted to access and hold the idle mode. The R/S pin is electrically connected to a central control unit. An additional pin, which may be termed an "acknowledge pin", is provided to indicate when the microprocessor is in the idle state. The R/S pin and the acknowledge pin can be useful for any operation in which the microprocessor must be stopped quickly, and can be used for bus control, debugging, diagnostics, multi-processor synchronization, and direct memory access operations. The idle mode is asserted between instructions, at an instruction boundary following execution of one instruction, but before execution of the next, when the execution unit has completed all its modifications of registers, flags, and memory for a first instruction, but before it begins this modification for the next instruction following in the pipeline. In the idle mode, the decoder does not issue instructions into the pipeline, but the clock operates normally and other microprocessor functions are operable. A port ma…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.