Low-noise amplifier with high input impedance, particularly for microphones
US5489876A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 8, 1992 |
| Grant date | Feb 6, 1996 |
| Priority date | — |
| Expiry date | Dec 8, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/372
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The amplifier includes a pair of bipolar input transistors (Q1, Q2), each having a base adapted to receive a differential input signal, a collector and an emitter which is biased by a first fixed current source (M7, M8) of its own and a degeneration resistor (R) which connects the emitters of the two bipolar transistors. The collector of each bipolar transistor is also biased by a second fixed current source (M5, M6) with a smaller current than that of the first source, and the collectors of the two bipolar transistors are furthermore connected to the input terminals of respective MOS amplifier devices (M1, M2, M3, M4, R.sub.L). The amplifier can be made in BCD, BiCMOS or purely CMOS technology, in which case the bipolar transistors are obtained as lateral bipolar transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.