Method of and circuit arrangement for decoding RS-coded data signals
US5490154A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 27, 1995 |
| Grant date | Feb 6, 1996 |
| Priority date | — |
| Expiry date | Jan 27, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6516
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of and a circuit arrangement for decoding RS-coded data signals is which data signals may be coded both in accordance with a code generator polynomial PA1 G(x)=(x+.alpha..sup.0) (x+.alpha..sup.1) . . . (x+.alpha..sup.15) and in accordance with a code generator polynomial PA1 G(x)=(x+.alpha..sup.120)(x+.alpha..sup.121) . . . (x+.alpha..sup.135). Dependent on the relevant code generator polynomial, switching takes place between two different constant multipliers in syndrome generators, and syndromes and erasure locations which have been determined are subjected to a Euclid's algorithm for deriving error location polynomials and error value polynomials. Error locations and error values for a code generator polynomial starting with .alpha..sup.0 are computed by means of a Chien zero search. Parallel thereto, a correction factor for a code generator polynomial starting with .alpha..sup.120 is determined. The computed error values of the code generator polynomial starting with .alpha..sup.0 are multiplied by this correction factor when data signals of the code generator polynomial starting with .alpha..sup.120 are decoded.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.