Interface having serializer including oscillator operating at first frequency and deserializer including oscillator operating at second frequency equals half first frequency for minimizing frequency interference
US5490282A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 1992 |
| Grant date | Feb 6, 1996 |
| Priority date | — |
| Expiry date | Dec 8, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M9/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A serial communication interface for sending and receiving serial data is provided including a serializer and a deserializer. The serializer is designed so that the serializer VCO has a center frequency that is one half the center frequency of the deserializer VCO. The serializer uses both edges of the clock to mix the serial bits. The deserializer design is unchanged. The two VCO's are implemented on separate chips with both chips located on the same metallized ceramic substrate with a ground plane about 40 mm apart. Near frequency interaction is significantly reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.