Counter-implantation method of manufacturing a semiconductor device with self-aligned anti-punchthrough pockets
US5492847A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 1994 |
| Grant date | Feb 20, 1996 |
| Priority date | — |
| Expiry date | Aug 1, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/919
Abstract
A method of processing a semiconductor device shapes a layer buried within a substrate of the semiconductor device. This layer has a conductivity the same as that of the substrate but has a higher doping level. In this process, a region of the layer is selected and ions of an opposite conductivity to the selected layer are counter-implanted in the region so that the doping level of the region is substantially canceled. A region of the layer adjacent to the counter-implanted region retains a higher doping level. Alternative techniques are employed to protect the doped region against the counter-implant. In a first approach, the layer is doped and subsequently a mask is formed on the surface of the substrate. The mask is furnished by a part of the semiconductor device, such as a spacer which is connected to the gate electrode after the dopant layer is formed in the substrate. After the mask is formed, ions are counter-implanted with the mask protecting the doped region. In a second approach, both the ion implant forming the doped layer and the counter-implant are performed after masking structures are formed, however the ion implant is a large-angle implant which implants ions beneat…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.