Field effect transistor and method of manufacturing the same
US5493136A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 1994 |
| Grant date | Feb 20, 1996 |
| Priority date | — |
| Expiry date | Feb 17, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/605
Abstract
This invention provides a high-speed FET with a sufficiently high output current, and an FET having a high mobility of channel electrons and a high electron saturation rate. For this purpose, in this invention, a buffer layer, a first channel layer, a first spacer layer, a second channel layer, a second spacer layer, a third channel layer, and a capping layer are sequentially epitaxially grown on a semi-insulating GaAs semiconductor substrate. Drain and source regions are formed, and a gate electrode is formed to Schottky-contact the capping layer. Drain and source electrodes are formed to ohmic-contact the drain and source regions. Extension of a surface depletion layer from the substrate surface to a deep portion is prevented by the third channel layer closest to the substrate surface. For this reason, a sufficient quantity of electrons for forming a current channel are assured by the second and first channel layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.