Display update controller
US5493648A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 1993 |
| Grant date | Feb 20, 1996 |
| Priority date | — |
| Expiry date | Mar 23, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for detecting high speed data received by a computer and for delaying displaying the receive data, thereby increase the microprocessor time devoted to receiving and storing the input data. Three parameters are utilized for determining when updating the display should be delayed because data input speed is high. First, if the input data is close to filling the computer's receive buffer, the data input speed is high. Second, if the data input port becomes idle, no more data is being input to the computer and the display may be updated. Third, if the display has not been updated recently, as indicated by a preset timer timing out, an update of the display is forced so that the user can verify that data is successfully being input. By varying and limiting the number of display updates, the microprocessor is allocated more time to store and process received data when the data input speed demands. By improving the microprocessor's ability to store and process received data, data communications are not disrupted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.