Semiconductor memory device used as a digital buffer and reading and writing method thereof
US5495444A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 1994 |
| Grant date | Feb 27, 1996 |
| Priority date | — |
| Expiry date | Jul 14, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device having a small chip area is provided to reduce a manufacturing cost. The semiconductor memory device has memory unit comprising memory cells arranged in a matrix comprising n rows and m columns, where m.gtoreq.2 and n.gtoreq.1, each of the memory cells having a single port and being capable of storing a single word of data comprising at least one bit, the memory cells arranged in a single column forming a memory cell block. The semiconductor memory device selects one set of two memory cells, one from an arbitrary memory cell block and the other from a different memory cell block. A reading operation performed and a writing operation for the set of two memory cells are performed during the same cycle. Another set of two memory cells are selected by a selecting unit, when the reading operation and the writing operation for one cycle are completed, for performing another cycle of the reading operation and the writing operation, the reading operation and the writing operation being repeated for a predetermined number of cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.