Method for clocking functional units in one cycle by using a single clock for routing clock inputs to initiate receive operations prior to transmit operations
US5495596A · kind A · utility
6Cited by
4References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 31, 1992 |
| Grant date | Feb 27, 1996 |
| Priority date | — |
| Expiry date | Jul 31, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4217
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit providing for an accurate sampling of data on a high speed bus in a computer system. Utilizing a single clock source, functional units that are capable of supporting two clock input sources, and a routing technique that provides for a receiving unit to be clocked prior to a transmitting unit, data transfer can occur reliably and economically on a high speed bus. Synchronization within a particular unit is accomplished by providing serial edge-triggered registers that are triggered by the respective clock inputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.