Error detector circuit for receiver operative to receive discretely-encoded signals
US5497383A · kind A · utility
15Cited by
16References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 22, 1993 |
| Grant date | Mar 5, 1996 |
| Priority date | — |
| Expiry date | Jan 22, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/007
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An error detector circuit, and an associated method, for a discrete receiver. The error detector circuit indicates bad frames of binary information signals which contain distorted bits of data in numbers so great as to prevent a convolutional decoder from generating, accurately, a decoded signal. When bit errors are detected in numbers beyond a first preselected value of the signal quality of a received signal combined with the detected number of bit errors forms a signal beyond a second preselected value, a bad frame is indicated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.