Wafer scale optoelectronic package
US5500540A · kind A · utility
121Cited by
9References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1994 |
| Grant date | Mar 19, 1996 |
| Priority date | — |
| Expiry date | Apr 15, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/855
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package and method for packaging optoelectronic or electronic components is provided in which multiple chip regions are packaged simultaneously prior to sectioning of the wafer into chips. The method and package allows micro-optic and other package elements to be integrated onto wafers on the same face as the optoelectronic or electronic devices without inhibiting the ability to make electrical contact to the devices. The package elements may be integrated to the wafer by material deposition, by spinning, or by physical mounting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.