Overvoltage clamp and desaturation detection circuit
US5500616A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 13, 1995 |
| Grant date | Mar 19, 1996 |
| Priority date | — |
| Expiry date | Jan 13, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0828
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus for suppressing voltage transients and detecting desaturation conditions in power transistor systems. A first transistor, usually a power transistor, has a first terminal, a second terminal, a drive terminal, and an avalanche breakdown voltage rating between the first mad second terminals. The cathode of a first diode is coupled to the first terminal of the first transistor. The first diode has a reverse breakdown voltage which is less than the avalanche breakdown voltage rating of the first transistor. The anode of a second diode is coupled to the anode of the first diode, and the cathode of the second diode is coupled to the drive terminal of the first transistor. Driver circuitry is also coupled to the drive terminal, and provides a drive signal to the first transistor. An RC network comprising a first resistor and a first capacitor is coupled to the driver circuitry. The base terminal of a second transistor is coupled to the driver circuitry by means of the RC network. The cathode of a third diode is coupled to the emitter of the second transistor and the anodes of the first and second diodes. The third diode has a reverse breakdown voltage rating. The anode of the…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.