Checksum calculation unit and method for error detection on data packets
US5500864A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 1993 |
| Grant date | Mar 19, 1996 |
| Priority date | — |
| Expiry date | Jun 14, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1833
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A high performance transport layer checksum calculation unit and method is described for use in computer data communications systems which provides simultaneous general purpose data movement and checksum calculations. Data must be copied from the main memory of a computer in order to be transmitted and often a checksum must be calculated on the data for error detection purposes. The invention involves performing both of these tasks simultaneously thus requiring only one scan of the data memory. The checksum calculation method improves throughput capacity via a unique hardware architecture supporting delayed checksumming of packet segments. A net improvement for packets larger than a certain size is achieved via partial addition during DMA controlled memory access allowing improved average cycle time per data packet segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.