Dynamic random access memory (DRAM) semiconductor device
US5502320A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 15, 1994 |
| Grant date | Mar 26, 1996 |
| Priority date | — |
| Expiry date | Mar 15, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/39
Abstract
A semiconductor device comprising a semiconductor substrate of first conductivity type, a trench type element isolation region formed in a preset depth from the semiconductor substrate surface, an element region of the first conductivity type surrounded by the element isolation region, a gate trench for forming a gate electrode, the trench being formed in the semiconductor substrate with a smaller depth than the element isolation region and extending through the element region and element isolation region, a gate electrode buried in the bottom portion of the gate trench via a gate insulation film, and source and drain regions of a second conductivity type formed in the element region and separated from each other by the gate trench, wherein the top surface of the gate electrode lies higher than the bottom levels of the source and drain regions and lower than a contact surface of the source and drain regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.